Time-base circuit arrangement having transistor and scr switching elements



May 30, 1967 J. c. MACKELLAR TIME-BASE CIRCUIT ARRANGEMENT HAVING TRANSIST AND SCR SWITCHING ELEMENTS Filed Nov. 13, 1963 2 Sheets-Sheet 1 Vcc FEG/i INVENTOR.

JOHN C. MA CKELLAR AGENT May 30, 1967 J TIME-BASE CIRCUIT ARRANGEMENT HAVING TRANSISTOR Filed NOV. 13, 1963 AND SCR SWITCHING ELEMENTS 2 Sheets-Sheet 2 -Vcc INVL'N'IOR.

JOHN C. MACKELLAR BY M K AGENT c. MACKELLAR 3,323,001

Unitd States Patent 3,323,001 TIME-BASE CIRCUIT ARRANGEMENT HAVING TRANSISTUR AND SCR SWITCHING ELEMENTS John Campbell Maekellar, East Grinstead, England, assignor to North American Philips Company, linc., New York, N.Y., a corporation of Delaware Filed Nov. 13, 1963, Ser. No. 323,433 Claims priority, application Great Britain, Dec. 28, 1962, 48,829/ 62 11 Claims. (Cl. 315-27) This invention relates to time-base circuit arrangements for generating a saw-tooth deflection current in a deflection coil. More particularly, the invention relates to a deflection circuit comprising two switching elements of the semiconductor type, a source of supply voltage having two terminals, drive means for delivering signals to turn on and off at least one of said two switching elements, an overswing coil and a supply impedance. The first switching element is connected in series with an inductive load, formed by said deflection coil, across the two terminals of said supply source. The second switching element is connected in series with said overswing coil and said supply impedance across said two terminals of said source, but in such a manner that the free end of the series connection of the second switching element and overswing coil is connected to the other terminal of the supply source as the first switching element. An A.C. coupling is connected between the first switching element-toinductive load junction and the supply imedance-to-overswing coil, second switching element junction.

Such a time-base circuit arrangement is already proposed in US. Patent No. 3,229,150.

In this proposed circuit arrangement, the first switching element is a diode which is turned on when the second switching element, a silicon controlled rectifier (SCR) is turned off automatically, and turned ofl when the second switching element is turned on by means of a drive signal. This on and ofl switching of the diode is accomplished by means of voltages developed in the time-base circuit arrangement itself. Especially at the instant the diode is turned ofi a large blocking voltage is developed across said diode (this blocking voltage jumps directly to said large value after the turn-ofl instant).

Due to the hole storage effect in the diode this blocking voltage causes an inverse current to flow, so that directly after the turning-0E instant a large blocking voltage is developed across the diode and an inverse current is flowing so that the diode must be able to withstand a large dissipation.

In order to overcome said difllculty, the circuit arrangement in accordance with the present invention is characterized in that the first switching element is a transistor connected in its forward direction with respect to the polarity of the voltage delivered by the supply source, and the second switching element is a controlled rectifier connected in its backward direction with respect to the polarity of the voltage delivered by the supply source. The drive means deliver a first drive signal to turn 01f the transistor before the end of a scanning stroke and turn it on at the beginning of the scanning stroke and a second drive signal to turn on said controlled rectifier at the instant the transistor is turned off.

As will be seen, when comparing the drawings of the present application and that of US. Patent No. 3,229,150, the whole process is reversed. This means that the transistor-current is taken over by the SCR-current and that, after the transistor-current is reduced to zero, the voltage across it rises, but slowly, so that even when the transistor-current is not completely zero at the instant the voltage across it is rising, the transistor dissipation is still low.

In order that the invention may readily be carried into effect, an embodiment of a line time-base circuit arrangement with two controlled switching elements in accordance with the invention will now be described by way of example, with reference to the accompanying drawings, in which:

FIG. 1 shows an embodiment Without an EHT transformer;

FIG. 2 shows curves of voltages and currents occurring in the embodiment of FIG. 1; and

FIG. 3 is an improved embodiment of the circuit arrangement of FIG. 1, which includes an EI-IT transformer and a core desaturation technique.

Referring now to FIG. 1, the arrangement described is suitable for use as a line time-base for a television receiver employing magnetic deflection. This circuit arrangement supplies a saw-tooth current waveform to an inductive load constituted by deflection coils L The arrangement comprises, as the first switching element, a switching transmsistor T having its emitter-collector path in series with said load L across a pair of D'.C. supply rails, one grounded and one at a voltage -V A silicon controlled rectifier (SCR) D serving as the second switching element, is connected in series with an overswing coil L and with an inductance L which serves as the supply impedance, across said rails with the inductance L connected to the same rail as the transistor T An A.C. coupling C is provided between the transistor-to-load junction and the inductance to overswing coil junction Q. It will be clear, however, that SCR D and overswing coil L can be interchanged, without changing the behaviour of the circuit arrangement.

The capacitance of capacitor C constitutes, with the inductance of the load L and of the overswing coil L a tuned circuit having a period equal, or approximately equal, to four times the desired fiyback period.

The controlled rectifier D is a trigger device. The overswing coil L is necessary in the circuit because it enables the transistor current to be taken over by the controlled rectifier current from the moment the transistor is turned ofl. In this example the arrangement includes, as will be seen, drive means consisting of a trans former comprising a primary winding P and two secondary windings S and S The secondary winding S is connected through an R.C.-network between the base and emitter electrodes of transistor T The secondary winding S is connected betwen two points X and Y which, through a further R.C.-network, are coupled to the cathode and control electrodes of rectifier D To the primary winding P are applied impulses I. These impulses I induce in the secondary winding S impulses which urge transistor T to draw current from instant t to instant t (see also FIG. 2) and induce impulses in the secondary winding S for turning the SCR on at the instant t (FIG. 2) prior to the end of the scanning time (i by a signal applied between its cathode and control or base electrode. It will be clear, however, that a transistor also could be used for the second switching element D but in that case the impulses at the secondary winding S must also turn off this second transistor. Then difficulties occur due to the fact, as will be explained hereinafter, that the current through the second switching element must increase from the instant t to the instant t and thereafter decrease. This means that the impulses applied to the second switching element must be able to decrease the current through it from the instant t However, the impulses I applied to the primary winding must be of such a form that they, when induced in secondary winding S are able to begin with a turn-off of transistor T at the instant t and to hold this transistor in a turned-off condition until the instant 1 This means the impulses I must have one polarity from instant t to t and the other polarity from instant t to L; as shown in FIG. 1, in which the broken line indicates gr-ound potential.

When however, rectifier D should be replaced by a transistor impulses I should have one polarity from instant t to 1 and of the other polarity from instant t t the next instant 1 So special impulses would be needed for the second switching element. In the case where a SCR is used, it is only necessary to turn-on the SCR at the instant t because its turn-0E is accomplished automatically.

The operation of the circuit will now be explained with the aid of FIG. 2 in which FIG. 2(a) represents the collector current (1 FIG. 2(1)) the emitter-collector voltage (V of the transistor T FIG. 2(0) the voltage V at the junction point Q and FIG. 2(d) the current i through the rectifier D At the start of the scanning period t a negative going drive pulse is applied to the base of transistor T with such amplitude as to cause the transistor T to bottom so that a substantially linearly increasing current flows through T (and L throughout the major part t t of the stroke or scanning period.

Simultaneously with the circuit L T a separate circuit is operated in the period I 4 namely the circuit T -C L In this circuit C and L act as a tuned circuit having a very long period (long when compared with the period t t whose value is not at all critical. At the start of the scan, the capacitor C will be assumed to be charged, the polarity being negative on the transistor side and positive on the other. During the stroke period this capacitor discharges resonantly through T and the inductance L and, when this discharge is completed at some instant between t and t the voltage across C (and L will pass through zero and then change sign (see FIG. 20 instant t At a later instant t this voltage will have risen in resonant manner to a value equal to the supply voltage V At this instant, the SCR (which has been in the off-state) has its reverse anode-cathode voltage reduced to zero. From t t the voltage across C continues to rise and thus forward biases the SCR in anticipation of the trigger pulse to be obtained from winding S Since T is bottomed by means of the pulses from winding S it acts virtually as a direct connection to ground. These latter changes can conveniently be followed as changes in the voltage at point Q as represented in FIG. 2(a) (the curvature of the sine-wave is only slightly visible, at instanst t due to the very long period of L C The region in which this voltage exceeds V (i.e. t t represents forward anode-cathode bias for the SCR.

The desired duration of the scanning stroke extends further than instant t namely up to instant However, in order to anticipate the effect of hole storage in T and in accordance with the invention, transistor T is turned off at an instant t sufficiently early to allow the collector current and hole storage to have decayed to a negligible level at the instant t The SCR is triggered into conduction at the same instant 1 by a signal derived from the drive waveform via connections XY. So another circuit path is opened, namely that through capacitor C load L rectifier D and completed through overswing coil L This last circuit path is called the commutation circuit because the charge of capacitor C is commutated into a discharge at the instant 1 The commutating current flowing through this commutation circuit enables the current in transistor T to reduce to zero at the instant t because after the transistor current has been reduced to zero the discharge current can continue to flow through said commutation circuit. Thus the current through transistor T is taken over in a so-called take-over period by the commutation circuit.

The decay of current in transistor T during said takeover period (I 4 is shown in FIG. 2(a) to occur as a 4; half cycle of a sine-wave. This is due to resonance of L and C L having a small value chosen accordingly.

At some instant during the take-over period it is necessary to turn transistor T off at its base, and to maintain this base turn-off voltage up to the end (t of the flyback period. In this example the turn-off instant chosen, for convenience, is the instant 1 since this allows the same drive waveform to be used to also turn on the SCR. The SCR D is turned off automatically as will be explained more fully hereinafter.

Up to instant t the stroke current i has been rising substantially linearly. During t t the transistor T remains conductive and therefore its collector electrode is substantially at ground potential. Thus the DC. supply voltage V is still applied across load L and the stroke current therein continues to rise up to instant t as desired.

As mentioned above the initial discharge of capacitor C is completed at the instant t when the voltage across this capacitor is zero. Thereafter capacitor C will be charged such that its electrode connected to the junction point Q will become negative with respect to the electrode connected to the transistor T This charge will continue until the instant t Then transistor T is turned off and SCR D turned on. The turn-on of SCR D means that the discharging of capacitor C will be accelerated because inductance L is now inserted. Thus a new LG. circuit is formed by L and C Therefore the voltage V at the point Q will rise rapidly (see FIG. 2(0)) until the instant t at which instant the current through capacitor C is zero. Thereafter the current through capacitor C again changes direction. So the voltage V starts to decrease and will be equal to V at the instant t This is so because at the instant t the current I' is maximum (see FIG. 2(d)) and because current i is zero (see FIG. 2(a)). The current through capacitor C is practically equal to the current I' (neglecting the small current flowing through L at this instant) and also equal to i so that in the resonant circuit, now formed by L C and L the current is maximum and thus the voltage across capacitor C and the voltages across inductances L and L will be zero. Therefore point Q gets the voltage V assuming that the SCR has practically no impedance when turned on. After the instant t which is the start of the fiyback period, the current will continue to fiow through the resonant circuit L C and L whereby the electromagnetic energy stored in inductance L during the period t t will be transferred to electrostatic energy in the capacitor C Thus capacitor C is once again charged resonantly by energy stored in L and, at an instant t' (just prior to t.;) all this stored energy will have been transferred to capacitor C (this is the charged state postulated initially). This resonant charging of C occurs during a time period equal to one quarter of the time period of the resonant circuit formed by L L and C The accompanying current flow through the loop circuit L C L and SCR changes sign when C is fully charged. Since the SCR cannot conduct in its reverse direction the said current flow would cease at this instant t Thus there is a short initial delay t t due to the hole storage effect in the SCR because all the holes are not removed until the time t Therefore the instant t t is the effective end of fiyback and the start of the next stroke, and T is arranged to be then turned on (at its base) by the drive waveform.

With regard to the choice of the value of C and L the period of the tuned circuit L L C was given generally as four, or approximately four, times the desired fiyback period. This is of special importance as will be seen from FIG. 2(b), because with this choice of the tuned circuit L L C the rise of the collector voltage V starting at the instant t was not very steep, and this rise would be much steeper if the period of the tuned circuit L L C was chosen to be two times the desired fiyback period.

In the present specific example, the period chosen for the tuned circuit L L C (which is equal to four times the period t -t' is less than four times t -t in order to accommodate the turn-off delay of the SCR due to hole storage.

The said delay in the SCR turn-off has an effect in that C discharges back into L between instants t' and t thus causing a small current in L in a direction opposite to that which would be produced by a supply-voltage V, through T The new current stroke starts from this level of inverse current which flows through transistor T (see FIG, 2(a)) by virtue of the transistor being capable of conducting in its reverse direction with its emitter-collector section operating as a forwardly conducting diode while the inverse current lasts.

It may be added that throughout the scanning period the circuit T C L will carry a current (which to a first approximation may be regarded as constant) which will be in the forward direction of current flow through the transistor. This current will back ofi the said initial inverse current but it is found in practice that there remains a residual inverse current flow through the transistor.

In conclusion, it will be seen from FIGS. 2(a) and 2(b) that, although voltage is present across the transistor in the fiyback period t -r there is no current flow so that there is substantially no power dissipation in the transistor during fiyback time.

Even if the transistor current was not exactly zero at the instant t the transistor dissipation will be low because the collector voltage V is only rising slowly from the instant t (see FIG. 2(b) This is due to the fact that the take-over period t -t is chosen before the fiyback period I 4 This is possible because two switching elements are used which can be switched by means of the same impulses I which are applied to the drive means (transformer with windings P, S and S with such polarities to both switching elements that the transistor T is turned ofl? at the instant the SCR D is turned on. So not only the hole storage effect of transistor T is eliminated but also its total dissipation is reduced.

The AC, voltage for the display tube E.H.T. can readily be obtained in a conventional manner by connecting a step-up transformer in parallel with the scanning inductance L However, the circuit arrangement of FIG. 1 can be slightly modified to desaturate the core of the EHT transformer and thereby provides a substantial economy in the core volume.

In FIG. 3 the primary L of the EHT transformer having n.p. turns is connected in parallel with the series connection of scanning inductance L and capacitor C An object of the capacitor C is to introduce a small S-shaped wave correction on the linear saw-toothed scanning wave to correct the scanning non-linearity caused by a substantially fiat-faced display tube.

It also obviates picture shift by removing the DC. component from the coils L The inductance L of FIG. 1 includes the series combination of a further inductance L having n.s. turns.

As a result, all the DC. current flows through the EHT primary L and tends to saturate its core. This is prevented by the inclusion of the additional winding L in which the number of turns thereof is chosen so that n.s. I equals n.p.XI- The winding L constitutes the secondary of the EHT transformer which, after conventional rectification and smoothing, supplies the EHT voltage to the final accelerating electrode of the display tube.

Because of the voltage developed across L during the scanning period, the inductance value of L will have to be slightly changed in order to achieve the same circuit function.

The arrangement of FIG. 1 may, for example, employ the following set of components and values suitable for a 625-line system having a total line cycle time of 64 ,us.:

6 Table Supply V volts 12 Period t2t3 ,LLS 4 Period t3-t4 ,ILS Transistor T Mullard type AU 101 SCR D General Electric C 36 D Inductance L ,uh 97 Inductance L mh 12 Inductance L ,uh 17 Capacitance C ..,u.f.... 0.42

What is claimed is:

1. A circuit for generating a saw-tooth deflection current having a given fiyback period in a deflection coil, comprising first and second switching elements of the semiconductor type, a source of supply voltage having two terminals, drive means for delivering signals to turn on and off at least one of said switching elements, an overswing coil and a supply impedance, first means connecting said first switching element in series with said deflection coil across said two terminals of said supply source, second means connecting said second switching element in series circuit with said overswing coil, third means connecting said series circuit in series with said supply impedance across said two terminals of said source so that the free end of the series circuit comprising said second switching element and overswing coil is connected to the other terminal of the supply source than that to which the first switching element is connected, said first connecting means being arranged to form a first junction between the first switching element and deflection coil,- said third connecting means being arranged to form a second junction between said supply impedance and said series circuit, A.C. coupling means interconnecting said first and second junctions, characterized in that the first switching element is a transistor, poled in the forward direction with respect to the polarity of the voltage delivered by the supply source, and the second switching element is a controlled rectifier poled in the reverse direction with respect to the polarity of the voltage delivered by the supply source, said drive means being arranged to deliver a first drive signal to turn off the transistor before the end of a scanning stroke and turn it on at the beginning of the scanning stroke and a second drive signal to turn on said controlled rectifier at the instant the transistor is turned off.

2. A circuit arrangement as claimed in claim 1, wherein said A.C. coupling means is a capacitor, characterized in that said capacitor in conjunction with the deflection coil and the overswing coil form a fiyback circuit having a period approximately equal to four times said fiyback period.

3. A circuit arrangement as claimed in claim 2, wherein the time period between the turn-off of the transistor and the beginning of the fiyback period is equal to onehalf of the period of the resonant circuit formed by said coupling capacitor and said overswing coil, said time period being substantially equal to the time necesary to drive the holes out of the base region of transistor by means of said first drive signal when turning off said transistor.

4. A circuit arrangrnent as claimed in claim 1, wherein said drive means comprise a transformer having one primary and two secondary windings, means for supplying to said primary winding a drive signal, means connecting the first secondary winding to the control electrode of the transistor for delivering thereto said first drive signal, and means connecting the second secondary winding to the control electrode of the controlled rectifier for delivering thereto said second drive signal.

5. A circuit arrangement as claimed in claim 1, further comprising means for generating an AC. voltage for the EHT supply to the display tube, said voltage generating means comprising a capacitor effectively connected in series with the deflection coil, means connecting the primary winding: of anEHT I I I said series. combination, means connecting a further in- I I said capacitor, said step-up transformer across I ductance in series with the supply impedance which is i I connected series with the controlled rectifier, where I in said further inductance is-magneticaly coupled; to said. I ,EHT primary winding, the turns ratio ofthe EHT primary I winding Eandthe further inductance being chosen so as to substantially desatu'rate the core: of l said IEHT transformer. I

. .6. A circuit fOI' I generating. an alternating current of and semiconductor amplifier means having a control electrode for controlling the current flowtherein, a secpoled in the forward 'direction'with respect: tolsaid'voltage source and said controlled rectifier being poled in the reverse direction'with respect to said voltage source, I a capacitor interconnecting said first. and, second series circuits to form first and second closed loop circuits, said first closed loop circuit.comprising,gin series, said inductive load, said controlled rectifier, said. inductanceend 7. A: circuit as described in claim 6, wherein said first closed loop circuit forms a tuned circuit having aiperiod approximately equal to four times the .fiyback period of '10 I sawtooth waveformin an inductive load comprising, a I

source of direct voltage, a first series .circuit connected across said voltage source comprising said inductive load I end. series circuit connected across said voltage source I comprising a controlled rectifier having a gate: electrode and connected in series with an inductance and -im- I pedancej means, said; semiconductor amplifier means being I means isarranged to turn said-semiconductor amplifier on-and' off atl east once during each .cycle of said saW-' tooth; alternating current, whereby said second closed I I I I I loop circuit is. closed 'vi'a said semiconductor. amplifier during the stroke period .therebyjto resonantly'discharge said capacitor and said first closed loop circuit is; closed I I via sai d controlled rectifier duringthe .fiyback period' thereby to resonantly charge said capacitor.

said first branch c'omprising'first and second series-con nected arms comprising a transistor poled in the forward direction relative to said voltage source'and siaid ,induc-' I tilvei load, respectively, said second. branch comprising third and fourthseriesrconnected arms, said third arm. comprising a supply impedance and-said fourth arm comprising,.in series, an-overswing' coil-and a controlledrectifier poled in the reverse direction relative to, saidvoltage I source, A,C. coupling means connected between the unc-. I I tion of said first and second arms andthe junction of said third and fourth arms, I signal drive. means coupled to: the control electrode. of said transistor and to the gate I Second p comprising in Series Said I I i electrode of said controlled rectifier, said drive means impedance means, said semiconductor amplifier andsaid I capacitor, and drive means coupled-te said control and l I gate electrodes for simultaneously applying thereto drive I signals of a polarity tending to turn off current flow in I said semiconductor amplifier and to turn jonIcurre-nt flow I in said controlled rectifier, respectively. i t

being arranged to supply a first drive signal to said -control electrode to turn said transistor on {and oil at least once duringeach cycle of said sawtooth'alte'rnating' current and to supply a second drive signal to said gate :e'l e'c- I I i I tr-ode so as to turn on said-controlled rectifier at the same 3 1 time in each cycle that said'first drive signal turns oil said transistor.

I I .11, .A circuit as described in claim. 10,. wherein said A transistor and saidl controlled rectifier are arrangd in opposed arms ofsaidbridge circuit.

. References Cited I I UNITED STATES PATENTS 3,210,601 10/1965 Walker 315-27 DAVID G. REDINBAUGH, Primary Examiner.

T. A, GALLAGHER, Assistant Examiner.

.10. A ci rcuit for generating an alternating current of I sawtooth waveform in an inductive load comprising, a "source of direct voltage, a bridge circuit comprising first t and second branches connected'across said voltage source, 

6. A CIRCUIT FOR GENERATING AN ALTERNATING CURRENT OF SAWTOOTH WAVEFORM IN AN INDUCTIVE LOAD COMPRISING, A SOURCE OF DIRECT VOLTAGE, A FIRST SERIES CIRCUIT CONNECTED ACROSS SAID VOLTAGE SOURCE COMPRISING SAID INDUCTIVE LOAD AND SEMICONDUCTOR AMPLIFIER MEANS HAVING A CONTROL ELECTRODE FOR CONTROLLING THE CURRENT FLOW THEREIN, A SECOND SERIES CIRCUIT CONNECTED ACROSS SAID VOLTAGE SOURCE COMPRISING A CONTROLLED RECTIFIER HAVING A GATE ELECTRODE AND CONNECTED IN SERIES WITH AN INDUCTANCE AND IMPEDANCE MEANS, SAID SEMICONDUCTOR AMPLIFIER MEANS BEING POLED IN THE FORWARD DIRCTION WITH RESPECT TO SAID VOLTAGE SOURCE AND SAID CONTROLLED RECTIFIER BEING POLED IN THE REVERSE DIRECTION WITH RESPECT TO SAID VOLTAGE SOURCE, A CAPACITOR INTERCONNECTING SAID FIRST AND SECOND SERIES CIRCUITS TO FORM FIRST AND SECOND CLOSED LOOP CIRCUITS, SAID FIRST CLOSED LOOP CIRCUIT COMPRISING, IN SERIES, SAID INDUCTIVE LOAD, SAID CONTROLLED RECTIFIER, SAID INDUCTANCE AND SAID CAPACITOR, SAID SECOND LOOP COMPRISING, IN SERIES, SAID IMPEDANCE MEANS, SAID SEMICONDUCTOR AMPLIFIER AND SAID CAPACITOR, AND DRIVE MEANS COUPLED TO SAID CONTROL AND GATE ELECTRODES FOR SIMULTANEOUSLY APPLYING THERETO DRIVE SIGNALS OF A POLARITY TENDING TO TURN OFF CURRENT FLOW IN SAID SEMICONDUCTOR AMPLIFIER AND TO TURN ON CURRENT FLOW IN SAID CONTROLLED RECTIFIER, RESPECTIVELY. 